ZF and SiliconAuto debut I/O chip for ADAS compute

ZF and SiliconAuto have unveiled a new input/output (I/O) interface chip and companion microcontroller for automotive high-performance computers, with its first live demonstration taking place at Embedded World 2026 in Nuremberg. The solution handles sensor data acquisition and pre-processing independently of the main system-on-chip (SoC), offering automakers the flexibility to integrate their preferred compute platform via standardised high-speed interfaces.

The I/O interface chip integrates automotive sensor interface intellectual property alongside camera image signal processing (ISP) and on-chip radar signal processing. It is paired with SiliconAuto’s XMotiv M3 microcontroller, which manages safety functions including secure boot, power sequencing and clock control. The system supports connections via PCIe, Ethernet or UCIe, and is compatible with any OEM-selected performance SoC regardless of its native automotive interface support.

By offloading sensor acquisition and pre-processing to the dedicated chip, the design frees processing capacity on the performance SoC for perception and driving functions. Manufactured in a lower-cost processing node, the chip reduces power consumption by limiting data transfers to double data rate (DDR) memory. The architecture scales from entry-level advanced driver assistance systems (ADAS) to SAE Level 4 automated driving.

ZF and SiliconAuto intend to evolve the platform toward a fully chiplet-based architecture using open die-to-die interconnect standards, allowing OEMs to update compute, AI inference and I/O components without complete system redesigns. The project has received support from the German Federal Ministry for Education, Research and Space under the ZuSEKI-mobil programme.

Source: ZF